Assistant Professor of Electrical and Computer Engineering
Haggerty Hall 216
(414) 288-5720
Complete CV
Cadence University Program Member



Research Interests

  • Design methods for network-on-chip based systems-on-chip and embedded systems
  • Design automation for VLSI and FPGA circuits
  • Analysis and optimization of power systems
  • Reconfigurable and parallel computing

Professional Preparation

Ph.D., 2004, Electrical and Computer Engineering, University of Minnesota
M.S., 1998, Signal Processing, Technical University of Iasi
B.S., 1996, Microelectronics, Technical University of Iasi

Selected Recent Publications

Yamamoto, A. Y., Ababei, C. (2014). Unified reliability estimation and management of NoC based chip multiprocessors. Elsevier, Microprocessors and Microsystems.

H. Sajjadi Kia and C. Ababei, A new reliability evaluation methodology with application to lifetime oriented circuit design, IEEE Trans. on Device and Materials Reliability, vol. 13, no. 1, pp. 192-202, March 2013.

A.Y. Yamamoto and C. Ababei, Unified system level reliability evaluation methodology for multiprocessor systems-on-chip, IEEE International Green Computing Conference, Lighter-than-Green Dependable Multicore Architectures Workshop, San Jose, CA, June 2012.

C. Ababei, H. Sajjadi Kia, O.P. Yadav, and J. Hu, Energy and reliability oriented mapping for regular Networks-on-Chip, ACM/IEEE Int. Symposium on Networks-on-Chip (NOCS), Pittsburg PA, May 2011.

C. Ababei and R. Kavasseri, Efficient network reconfiguration using minimum cost maximum flow based branch exchanges and random walks based loss estimations, IEEE Trans. on Power Systems, vol. 26, no. 1, pp. 30-37, Feb. 2011.


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Electrical engineers work on the generation, transmission and distribution of electricity and how we use it. Computer engineers design and build the hardware and software that run our global marketplace. Think about the gadgets you plug into on a daily basis. How many of them are powered by electricity or computer technology?

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